The present invention relates in general to stable voltage references and, more particularly, to voltage references which exhibit improved power supply rejection ratio (PSRR).
Stable voltage references are required for utilization circuits whose performance would be degraded if not for the isolation and stabilization characteristics that these voltage references provide. A broad array of utilization circuits which require such voltage references for isolation and stabilization include A/D converters, switched mode power supplies and voltage regulators to name only a few.
Techniques exist today which employ a single stage voltage reference cell to provide a stable voltage reference derived from a relatively noisy and unregulated voltage source or potential. The voltage source can be a voltage bus which is shared by other circuits co-resident within a given integrated circuit or a voltage grid which is shared by multiple integrated circuits. Since the voltage bus or grid is shared by many circuits, the bus or grid tends to conductively couple the transient voltage signals of its constituent circuits. These transient voltage signals appear as noise on the voltage bus or grid and generally induce undesirable effects within each circuit connected to it.
Prior art voltage references employ a single stage or single voltage reference cell to develop an output voltage, which is relatively isolated from its input. Many such stages or cells consist of two transistors, typically implemented using field effect transistors which are connected in series to one another. Typically, the source of the first transistor is connected to the drain of the second transistor and the combination is connected between an unregulated voltage supply bus and ground. An explanation of the operation of the prior art single stage voltage reference follows.
The first transistor of the single stage voltage reference is generally configured as a depletion mode transistor and supplies a constant current to the second transistor, generally configured as an enhanced mode transistor, whose drain voltage is used as the output or stable voltage source. The second transistor is generally configured in a diode fashion, i.e. the transistor""s gate and drain are electronically connected together. The output voltage of the voltage reference is derived at the gate terminal of the second transistor and is characterized to operate independently from the unregulated voltage supply potential which is coupled to the drain terminal of the first transistor.
Integrated circuits today are called upon to operate in increasingly noisy environments. Power supply buses are effective conductors of noise and they provide efficient transports of noise to all circuits connected to them. One way to reduce the overall noise level within these circuits is to design superior voltage references whose stability and power supply rejection performance characteristics are superior to the prior art voltage references. Using voltage references, which exhibit greater PSRR values, less noise would be coupled through the power supply inputs to these devices thereby increasing their noise immunity.
Hence, a need exists for a voltage reference cell which exhibits improved power supply rejection ratio (PSRR).